1. Introduction to logic synthesis using Verilog HDL

by Reese, Robert B | Thornton, Mitchell Aaron.

Material type: book Book; Format: print ; Literary form: Not fiction Publisher: San Rafael: Morgan & Claypool Publishers, 2006Availability: Items available for loan: [Call number: 621.392 REE] (1).
2. Finite state machine datapath design, optimization, and implementation

by Davis, Justin S | Reese, Robert B.

Material type: book Book; Format: print ; Literary form: Not fiction Publisher: San Rafael: Morgan & Claypool Publishers, 2008Availability: Items available for loan: [Call number: 621.392 DAV] (1).

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